What’s new on the chip 

The 2DNeuralVision consortium finalized the first integrated design of a compact 4×2 optical neural network (ONN) photonic chip. The layout combines SiN waveguides with graphene based active elements, plus metal traces and pads for control – ready to plug into the project’s digital test rack. This design marks a key step toward enabling ultrafast, low power AI acceleration using photonics – a strategic priority for Europe as computing demands continue to grow. 

Design choices that unlock speed 

This chip incorporates several innovations that improve performance: 

• Cleaner routing: waveguides are re‑routed after the grating couplers to avoid crossing metal lines, reducing undesired optical loss. 

• Low loss building blocks: crossings, directional couplers and MMIs are specified with tight loss targets, keeping signals strong across the array. 

• Room to grow: a path to larger crossbars is mapped – lower propagation loss and better separation between metal and photonic layers reduce heating and trace waveguide penalties. 

These architectural decisions enable higher bandwidth, lower energy processing – crucial for any weather perception and embedded AI. 

Ready for first “lab miles” 

After fabrication, the prototype will be measured for transmission, insertion loss and tuning ranges, then exercised in the digital control system on simple vision tasks (e.g., edge detection; small benchmark tests). Those results will guide the next tape‑out, guided by real measurements. 

Where this leads 

A working ONN PIC is a building block for lower latency, lower power perception. The design is small by intent – fast to learn from and geared to reveal the real bottlenecks that matter before scaling up.